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A Counting and Integrating Readout for Direct ConversionX-ray Imaging

The CIX project explores a novel signal processing concept for X-ray imaging with directly converting pixelated semiconductor sensors. The novelty of this approach compared to existing concepts is the combination of charge integration and photon counting in every single pixel. Simultaneous operation of both signal processing chains extends the dynamic range beyond the limits of the individual schemes and allows determination of the mean photon energy.

CIX_xrayMedical applications such as X-ray computed tomography can benefit from this additional spectral information through improved contrast and the ability to determine the hardening of the tube spectrum due to attenuation by the scanned object. A prototype chip in 0.35-micrometer technology has been successfully tested. The pixel electronics are designed using a low-swing differential current mode logic. Key element is a configurable feedback circuit for the charge sensitive amplifier which provides continuous reset, leakage current compensation and replicates the input signal for the integrator.




Pixel structure

CIX_PixelStructureA pixel providing counting and integrating x-ray imaging contains three basic elements: a photon counter, an integrator and a special feedback circuit which provides both signal shaping for the photon counter and signal replication for the integrator. The figure below shows the schematic structure of a pixel cell allowing simultaneous counting of individual photons and integration of the total signal current.









The Photon Counter

The signal processing chain of the photon counting channel consists of a charge sensitive amplifier (preamplifier), a comparator with differential output and a 12-bit ripple counter. Incoming charge accumulates on the feedback capacitor until it is removed by the feedback circuit, which is basically a differential pair acting as a voltage controlled current source. This continuous reset of the amplifier is implemented using MOS transistors operating in saturation region. The feedback current delivered to the counting amplifier is also mirrored and drained from the integrator input, thereby duplicating the original signal charge.

The Integrator

The integrator implementation is similar to the sigma-delta converter concept which is often used in high precision, low frequency measurement applications. The first stage of the integrator signal processing chain is an amplifier-comparator stage similar to the one found in the single photon counter. One difference is the clock-synchronized operation of the feedback circuit, which uses a charge pump that delivers a charge packet of defined size each time the accumulated charge on the feedback capacitor exceeds a given threshold. This type of feedback converts the incoming current to a frequency of pump actions. Two counters record the number of charge packets and the elapsed time, namely the number of clock cycles between the first and the last pump action in the measurement cycle.
A convenient property of this method of current measurement is that the discretization error decreases as the input signal gets smaller which leads to a nearly constant relative resolution throughout the full dynamic range. Common analog to digital converters with a constant bin size do not possess this property due to the inherently large relative discretization errors at small values.
The dynamic range of the integrator is determined by the charge packet size, the clock frequency and the measurement duration. For example, given a clock rate of 8 MHz and a measurement duration of 320 µs, the dynamic range extends over approximately 3.4 decades with an almost constant discretization accuracy of about 11.32 bits. The absolute values of the minimal and maximal measureable current are determined by the choice of the packet size.

The Feedback Service

CIX_FeedbackThe image above shows a simplified diagram of the feedback circuit. Its main purposes are signal shaping for the photon counter, signal replication for the integrator and leakage current compensation. Three differential pairs with different bias currents provide feedback and leakage current compensation. Differential pair 1 delivers fast, but weak feedback for the preamplifier. Pair 2 is used for leakage current compensation. It is biased with a significantly larger current, but responds with a longer timer constant than pair 1. Pair 3 is used for the offset correction in case of continuous leakage compensation. The four switches A, B, C and D allow different feedback types.

CIX0.1 - Prototype


The prototype chip was fabricated in AMS 0.35-µm technology. It contains seventeen counting and integrating pixels with a pixel size of 100 µm x 550 µm. Since this prototype does not have connections to an external sensor, the input signal is produced in each pixel using switched capacitor (10 fF) and switched current source charge injection circuits. Up to five 100 fF capacitors can be connected to the input node of each pixel to mimic the capacitive load of a connected sensor electrode. The feedback capacitors of preamplifier and integrator have sizes of 14 fF and 300 fF, respectively. Two different charge pump concepts were implemented in the integrator: a switched current source and a switched capacitor (240 fF).
Two of the pixels are partitioned into their main building blocks and allow investigation of the digital counters and the analog output of the counting amplifier. The analog signal can be measured using an analog buffer. Substrate noise coupling and digital-analog crosstalk during operation are minimized by using a low swing differential logic for the design of counters and digital circuits. The trigger signals of the charge injection circuits however, are full swing single line CMOS signals - which makes them the suspected dominant source of digital-analog crosstalk.

Test Environment & Results

CIX_Test_EnviromentInvestigation of the prototype chip demonstrated the feasibility of the concept and identified the properties. Simultaneous operation is fully functional, however exhibits limitations which may be addressed by a noise improved design.

The results of this prototype chip have be presented on the IEEE 2005 Nuclear Science Symposium/Medical Imaging Conference:
Counting and Integrating Readout for Direct Conversion X-Ray Imaging - Concept, Realization and First Prototype Measurements
Kraft, E.; Fischer, P.; Karagounis, M.; Koch, M.; Krueger, H.; Peric, I.; Wermes, N.; Herrmann, C.; Nascetti, A.; Overdick, M.; Ruetten, W.;
Nuclear Science Symposium Conference Record, 2005 IEEE Volume 5, 23-29 Oct. 2005 Page(s):2761 - 2765

CIX0.2 - Prototype

CIX02_PrototypeA second prototype chip (CIX0.2) has be designed and processed. Changes to CIX0.1 include improved design of the analog frontend circuits, I²C compatible digital control, a new readout scheme, pixelated layout, sensor connectivity and enhanced test circuits.
Characterization of this prototype is currently underway.

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